Официальный анонс PCIe 5.0

Официально анонсирован интерфейс передачи данных PCI Express 5.0 компанией-разработчиком PCI-SIG.

Новый интерфейс в два раза превышает пропускную способность PCIe 4.0 и составляет 32 ГТ/сек.

PCI-SIG заявил о полной готовности к использованию PCIe 5.0 через полтора года. Это коррелируется с план-графиком Intel по выпуску процессоров, в котором сообщается о готовности компании выпустить первые процессоры с поддержкой PCI Express 5.0 уже в 2021 году. О чём мы писали в материале Когда Intel будет поддерживать DDR5 и PCIe 5.0?

Основные спецификации PCI Express 5.0:

  • Скорость передачи данных 32 ГТ/сек и до 128 Гб/сек через х16 линий
  • Использует и дополняет спецификацию PCIe 4.0 и поддерживает более высокие скорости с помощью расширенных тегов и кредитов
  • Реализует электрические изменения для улучшения целостности сигнала и механических характеристик разъемов
  • Включает в себя новый обратно совместимый разъем CEM, предназначенный для дополнительных карт
  • Поддерживает обратную совместимость с PCIe 4.0, 3.x, 2.x и 1.x

Ниже приведены цитаты значимых людей IT индустрии из AMD, Nvidia, Epson и др. о новом интерфейсе (внимание! английский язык):


“AMD congratulates PCI-SIG on the release of the PCI Express 5.0 specification to the industry and the future 2x increase in performance it is expected to deliver. We expect to bring our first PCIe 4.0 specification CPUs to market this year and look forward to meeting the future bandwidth demands of end-users with PCIe 5.0 technology.”

~Gerry Talbot, AMD Corporate Fellow, Technology & Engineering Group, AMD

Astera Labs

“Completed in under 2 years, PCI Express 5.0 technology is poised to quickly become the connectivity backbone in the next generation of servers. Astera Labs, a provider of innovative connectivity solutions, supports the new technology and emerging heterogeneous compute topologies with purpose-built signal conditioning products that enable robust PCIe 4.0 and PCIe 5.0 interconnects.”

~Sanjay Gajendra, Chief Business Officer, Astera Labs


“PCI-SIG’s announcement of the PCI Express 5.0 specification is a significant step that addresses the increasingly demanding requirements for compute and networking applications. The doubling of bandwidth to 32GT/s can significantly reduce the I/O bottleneck and bolster overall application performance. As an ongoing contributor to the development of the PCI Express specification, Cadence supports this latest release with complete, high-quality PHY and controller IP, and verification IP including the TripleCheck verification technology. This comprehensive Cadence offering allows customers to get to market faster with a robust, high-performance solution while reducing development costs and risk.”

~Amjad Qureshi, Corporate VP, R&D in the IP Group at Cadence Design Systems

Diodes Incorporated

“Diodes Incorporated is the leading supplier of PCI Express products including signal conditioning, timing, signal and packet switches for over a decade. Huge growth in cloud computing is demanding higher performance storage and networking infrastructure, hence driving the need for faster peripheral connectivity. We are pleased that the PCI-SIG is releasing PCIe 5.0 specification at 32GT/s to drive faster connectivity.”

~Kay Annamalai, Senior Director of Marketing, Diodes Incorporated


As a world leader in timing products, Epson is proud of its involvement with PCI-SIG in the development of the PCI Express 5.0 specification. The evolution of PCIe 5.0 technology to 32GT/s, while maintaining backward compatibility, enables customers to drive innovation in 5G, cloud and enterprise datacenter, AI, and other data-driven applications. With low noise products that ease jitter budgets and simplify the design challenge, Epson stands ready to help as our customers determine their timing needs in support of this new standard.

~Daisuke Yamaguchi, Director of Marketing & Sales, Microdevices, Epson America, Inc.


“Genesis supports the PCI Express 5.0 specification release by already providing products that double the bandwidth to 32GT/s and focusing on the next evolution of products in the greater ECO system of solutions of PCIe.”

~Mick Felton, Director of Engineering, Genesis Connected Solutions


Intel believes that open standards foster platform innovation, create healthy ecosystems, and accelerate market growth. As a founding promoter of PCI Express architecture, we fully support the newly-released PCIe 5.0 specification, and look forward to continuing the PCI Express specification tradition of high-performance, multi-platform, open interconnect.”

~Dr. Debendra Das Sharma, Intel Fellow and Director of I/O Technology & Standards, Member of PCI-SIG® Board of Directors,Intel Corporation


“With the jump to 32Gbps signaling, the PCI Express 5.0 specification is bringing new levels of performance for demanding applications in the HPC, Cloud Computing, AI, and Networking and Storage spaces. PLDA brings 23 years of expertise in IP design and an extensive catalog of products and services dedicated to PCIe technology to shorten and secure our customers’ SoC, ASIC and FPGA development cycles. PLDA interface IP for the PCIe 5.0 specification are available today and are already being integrated into SoCs due for tape-out in early 2020.”

~Stephane Hauradou, CTO, PLDA

Mellanox Technologies

“The exponential growth of data and the ever-increasing demands for higher data center performance, require the fastest data speeds between the compute, the interconnect and the storage infrastructures. The combination of Mellanox high-speed InfiniBand and Ethernet solutions, and PCI Express 5.0 technology, will empower the next generation of high-performance computing, artificial intelligence, cloud, database, storage and other applications.”

~Gilad Shainer, vice president of marketing, Mellanox Technologies


“PCI Express 5.0 technology will advance graphics and high-performance computing by doubling its bandwidth to approaching 64GB/s while maintaining socket compatibility with prior versions of the PCIe specification. We are proud to be part of the PCI-SIG team and look forward to the innovation that will be sparked by this next evolution.”

~Michael Diamond, senior director of strategic partnerships at NVIDIA and member of the PCI-SIG® board of directors, NVIDIA

Silicon Labs

“One of the outstanding features of the PCI Express 5.0 specification that sets it apart from other communication standards is the inclusion of the Refclk performance in the specification. By fine tuning various system parameters to minimize the amount of reference clock noise that contributes to data transmission eye closure, PCI-SIG has been able to retain lower cost reference clock technology than competing standards at similar data rates. In addition, because PCI-SIG specifies the reference clock performance as part of the standard, companies like Silicon Labs which supply PCI Express technology reference clocks for a variety of applications, can further reduce cost by consolidating volume across multiple customers even though they use PCIe transceivers from different vendors.”

~Greg Richmond, Director of Engineering for Silicon Labs and contributing member of the PCI-SIG® Electrical Working Group, Silicon Labs


“As an active member of the PCI-SIG for more than a decade, Synopsys has been heavily involved with helping to define the PCI Express 5.0 specification. By providing a complete DesignWare Controller, PHY, and Verification IP solution for PCIe 5.0 to the market early, we have already enabled many customers to successfully tape out their advanced 32 GT/s SoCs, with many more expected this year.”

~John Koeter, vice president of marketing for IP, Synopsys


“Tektronix is excited about the role of PCI Express 5.0 technology in enabling the next generation of datacenters. The doubling of bandwidth to 32GT/s is core to solving datacenter performance and latency challenges enabling maximum throughput from the Ethernet links running at 400Gbps and beyond. As the industry migrates to PCIe 5.0 architecture, prior generations of PCIe architecture must be tested to maintaining backwards compatibility. It is critical that electrical physical layer testing is performed by a single test platform approved by the PCI-SIG for multiple generations. Tektronix is looking forward to partnering with customers to bring PCIe 5.0 solutions to market with a single approved hardware test platform that scales across all generations of PCIe technology.”

~Amy Taylor, General Manager, Wired Communications & Mil/Gov, Tektronix

Teledyne LeCroy

“Teledyne LeCroy is fully supportive of the PCI Express 5.0 specification and is proud to supply tomorrow’s tools today that will expedite product development utilizing the new speed of 32 GT/s. Teledyne LeCroy is driving new technologies with its test equipment and customer supportive solutions like our currently available PCIe 5.0 Summit M5x Protocol Analyzer.”

~Joe Mendolia, Vice President of Marketing, Protocol Solutions Group, Teledyne LeCroy

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